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18-hb-2010 Low-Level Synthese · TUPlan

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18-hb-2010

Low-Level Synthese

FB18 Electrical Engineering and Information Technology · Offered in SoSe 2026

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Weekly sessions · SoSe 2026

Wed11:40–12:25S306/053 · Vorlesung
Wed12:35–13:20S306/053 · Praktikum
Fri13:30–15:10S306/053 · Vorlesung

Parts

18-hb-2010-vlLecture2 contact h/week
18-hb-2010-prLab course2 contact h/week

Language: Englisch
Taught by: Prof. Dr.-Ing. Christian Hochberger, M.Sc. Katharina Schultheis

Course content

Die Veranstaltung behandelt alle Synthese-Schritte von der Register-Transfer Ebene abwärts und konzentriert sich dabei auf FPGA-relevante Verfahren: Logikminimierungsverfahren (exakt und heuristisch, für zweistufige und Multi Level Logik) Technologiemapping mit funktionaler Dekomposition und strukturellen Ansätze (z.B. FlowMap) analytische und heuristische Placer (Simulated Annealing, Genetic Algorithms) typische Verdrahtungsalgorithmen (PathFinder)

Exam dates

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